1. Field of the Invention
The invention relates to a charge pump circuit and a slice level control circuit suitably used for an optical disk reproducing device.
2. Description of the Related Art
Reproducing data recorded in an optical disk such as CD or DVD requires signal processing of converting an analog signal read by an optical pickup into a binary digital RF signal at a slice level control circuit (hereafter, referred to as an SLC circuit).
FIG. 5 is a circuit diagram showing a general SLC circuit. An analog RF signal read by an optical pickup is amplified by an RF amplifier (not shown) and inputted to an input terminal In. A capacitor 100 removes a direct-current component of the inputted analog RF signal, and the analog RF signal is supplied to one input terminal (an inverting input terminal) of a comparator 101. Vdd/2 (Vdd means a supply potential) is supplied to another terminal (a non-inverting input terminal) of the comparator 101 as a reference voltage. The comparator 101 compares the analog RF signal with the reference voltage and outputs a binary digital RF signal from an output terminal Out. In detail, the output of the comparator 101 is of a high level “1” when the analog RF signal is lower than the reference voltage, and the output of the comparator 101 is of a low level “0” when the analog RF signal is higher than the reference voltage. In the optical disk reproducing device, the digital RF signal is used as a reference clock of PLL (a phase locked loop).
One terminal (a positive terminal) of a capacitor 103 is connected between the capacitor 100 and the inverting input terminal of the comparator 101 through a resistor 102. Another terminal (a negative terminal) of the capacitor 103 is grounded.
A charge pump circuit 104 is further provided, which switches in response to the output level of the comparator 101 and flows a charging current 105 to the capacitor 103 and a 30 discharging current 106 from the capacitor 103. In detail, when the output level of the comparator 101 is the high level, the charge pump circuit 104 charges the capacitor 103 by flowing the charging current 105 to the capacitor 103. When the output level of the comparator 101 is the low level, the charge pump circuit 104 discharges the capacitor 103 by flowing the discharging current 106 from the capacitor 103.
Such charging and discharging of the capacitor 103 adjust the level of the mean voltage of the analog RF signal, and the mean voltage of the analog RF signal serves as the slice level thereof. In the ideal case of no offset in the comparator 101, the slice level is equal to the reference voltage.
The relevant technology of the invention is described in Japanese Patent Application Publication No. hei 9-237459.
The duty ratio of the high level and the low level of the digital RF signal obtained from the SLC circuit is required to be 50% for reducing jitter. For achieving this, the current values (absolute values) of the charging current 105 and the discharging current 106 which are the output currents of the charge pump circuit need be equal to each other.
However, when the above described SLC circuit is operated by inputting the analog RF signal of high frequency (several MHz or more), in the conventional charge pump circuit the rise time of the output current becomes long to cause “distortion” as shown by A and B portions in FIG. 6 (In FIG. 6, the plus current of the current I corresponds to the charging current 105 and the minus current corresponds to the discharging current 106.).
This makes it difficult to provide equal current values to the charging current 105 and the discharging current 106, so that the duty ratio of the digital RF signal can hardly keep 50% to cause jitter in the waveform of the output signal of the SLC circuit.